The present invention concerns the design and fabrication of large scale integrated circuits with the aid of a programmed data processor, hereinafter called compiler, by means of which an operator initially specifies a function and achieves a detailed instruction for the layout of a large scale integrated circuit which implements, in the selected technical realisation, the function which has been specified by the operator. The design, checking and testing of large scale integrated circuits is so complex that the use of such a programmed data processor is essential for any normal circuit or function. This is partly because the digital signal processing functions are inherently complicated, partly because the main data processing functions need to be decomposed into simpler functions which are within the library of the processor and partly because considerable computation is required in order to achieve an efficient layout of the network. It will be understood that the result of the computerised design process is a detailed specification defining, in terms of a particular technology, a complex integrated circuit. Such a specification may be regarded as a template for the fabrication of the physical embodiment of the integrated circuit.
Compilers of the kind set forth above are commercially available and have been described in the literature. Reference may be made for example to Rabaey et al.
"Cathedral - 2: Computer Aided Synthesis of Digital Signal Processing Systems", Proceedings of the IEEE CICC 1987 pages 157-160 (1987), S. G. Smith and R. W. Morgan "High Level DSPASIC Design Tool", Proceedings Euro--ASIC 1989 pages 117-129, Grenoble, France, January 1989; Hartley et al., "A Digit--Serial Silicon Compiler" Proceedings 25th ACM/IEEE DA Conference pages 646-649, California, June 1988; Proceedings of the 24th Design Automation Conference, Miami, Florida, June 1987; Proceedings of the International Workshop on Logic and Architectural Synthesis for Silicon Compilers, Grenoble, May 1988; Proceedings of the International Conference on Computer Aided Design, Santa Clara, California, November 1988; and IEEE Transactions on Computer Aided Design on Integrated Circuits and Systems, Volume CAD-5 Number 4, October 1986.
As an example of the complexity of the circuits which are realized with the aid of such processors, a sixteen bit discrete cosine transform circuit, comprising twenty five digital adders, twenty five digital subtractors and eleven digital rotators, requires for its full specification about seventy pages or more of schematic diagrams when expressed in detailed circuit form. It is not feasible to design circuits of such complexity by hand within any reasonable time. An added factor in the need to employ computer aided design is constituted by a multiplicity of other requirements, including the achieving of efficient utilization of area in the layout of the integrated circuit and particularly for digital signal processing, the optimization of throughput. One of many factors affecting throughput is the phenomenon of different arrival times of each of a multiplicity of signals at a multiple input gate, such as a NAND or AND gate.